`include "define.v"
`include "ppdefine.v"
module ppdecode
(
input  clk,
input  rst_n,
input  [7:0] opcode,
input [3:0]  rA,
input [3:0]  rB,
input [3:0]  rC,
input [15:0]  valImm,

output reg[31:0] d_valA,
output reg[31:0] d_valB,
output reg[3:0] d_dstE,
output reg[3:0] d_dstM
);
reg [3:0] d_srcA,d_srcB;
always @(d_opcode or d_rA)
begin
    casez(d_opcode)
	{`NORM_INS,`RMMOV16},
    {`NORM_INS,`RMMOV32},
    {`NORM_INS,`MRMOV16},
    {`NORM_INS,`MRMOV32},
    {`NORM_INS,`RRMOV16},
    {`NORM_INS,`RRMOV32},
    {`NORM_INS,`GROUP_OP,4'b????},
	{`NORM_INS,`PUSH}:d_srcA<=d_rA;
	
	{`NORM_INS,`POP},
	{`NORM_INS,`RET}:d_srcA<=`RSP;
	default:d_srcA<= `RNULL;
    endcase
end
always @ (d_opcode or d_rB)
begin
    casez(d_opcode)
    {`NORM_INS,`RMMOV16},
    {`NORM_INS,`RMMOV32},
	{`NORM_INS,`GROUP_OP,4'b????}:d_srcB<=d_rB;
	
	{`NORM_INS,`POP},
	{`NORM_INS,`RET},
    {`NORM_INS,`CALL},
	{`NORM_INS,`PUSH}:d_srcB<=`RSP;
	default:d_srcB<=`RNULL;
    endcase
end
always @(d_opcode or d_rB or d_rC)
begin
    case(d_opcode)
	{`NORM_INS,`RRMOV16},
    {`NORM_INS,`RRMOV32},    
    {`NORM_INS,`IRMOV16} :d_dstE<=d_rB;
	{`NORM_INS,`GROUP_OP,4'b????}:d_dstE<=d_rC;

    {`NORM_INS,`POP},
	{`NORM_INS,`RET},
    {`NORM_INS,`CALL},
	{`NORM_INS,`PUSH}:d_dstE<=`RSP;
	default:d_dstE<= `RNULL;
    endcase
end

always @(d_opcode or d_rB)
begin
    case(d_opcode)	
    {`NORM_INS,`MRMOV16},
    {`NORM_INS,`MRMOV32},
    {`NORM_INS,`POP}     :d_dstM<=d_rB;
    
	default:d_dstM<= `RNULL;
    endcase
end

regFile U_regFile(
    //outputs
    .d_rvalA(d_rvalA),//[31:0]
    .d_rvalB(d_rvalB),//[31:0]
    //inputs
    .clk(clk),
    .rst_n(rst_n),
    .d_srcA(d_srcA),//[3:0]
    .d_srcB(d_srcB),//[3:0]
    .w_dstE(w_dstE),//[3:0]
    .w_dstM(w_dstM),//[3:0]
    .w_valE(w_valE),//[31:0]
    .w_valM(w_valM),//[31:0]
    .w_wordselE(w_wordselE),//00-rx,01-rxL,1x-rxH
    .w_wordselM(w_wordselM)//00-rx,01-rxL,1x-rxH
    );
endmodule
